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  <h1 id="STM32F405_64PIN" class="content-subhead">STM32F405_64PIN</h1>
  <p>
    <span>2021-04-01</span>
    <span><span class="post-category post-category-embedded">嵌入式</span></span>
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    <h2 id="gpio">GPIO</h2>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>NUM</th>
<th>PIN</th>
<th>FUC</th>
<th>OTG</th>
<th>ETH</th>
<th>SDIO</th>
<th>DCMI</th>
<th>SPI</th>
<th>I2S</th>
<th>I2C</th>
<th>USART</th>
<th>TIM</th>
<th>CAN</th>
<th>AF</th>
</tr>
</thead>
<tbody>
<tr>
<td>1</td>
<td>VBAT</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>RTC<em>TAMP1<br/>RTC</em>TAMP2<br/>RTC_TS</td>
</tr>
<tr>
<td>2</td>
<td>PC13</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>RTC<em>OUT<br/>RTC</em>TAMP1<br/>RTC_TS</td>
</tr>
<tr>
<td>3</td>
<td>PC14</td>
<td>OSC32_IN</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>OSC32_IN</td>
</tr>
<tr>
<td>4</td>
<td>PC15</td>
<td>OSC32_OUT</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>OSC32_OUT</td>
</tr>
<tr>
<td>5</td>
<td>PH0</td>
<td>OSC_IN</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>OSC_IN</td>
</tr>
<tr>
<td>6</td>
<td>PH1</td>
<td>OSC_OUT</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>OSC_OUT</td>
</tr>
<tr>
<td>7</td>
<td>NRST</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>8</td>
<td>PC0</td>
<td></td>
<td>OTG<em>HS</em>ULPI_STP</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>ADC123_IN10</td>
</tr>
<tr>
<td>9</td>
<td>PC1</td>
<td></td>
<td></td>
<td>ETH_MDC</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>ADC123_IN11</td>
</tr>
<tr>
<td>10</td>
<td>PC2</td>
<td></td>
<td>OTG<em>HS</em>ULPI_DIR</td>
<td>ETH<em>MII</em>TXD2</td>
<td></td>
<td></td>
<td>SPI2_MISO</td>
<td>I2S2ext_SD</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>ADC123_IN12</td>
</tr>
<tr>
<td>11</td>
<td>PC3</td>
<td></td>
<td>OTG<em>HS</em>ULPI_NXT</td>
<td>ETH<em>MII</em>TX_CLK</td>
<td></td>
<td></td>
<td>SPI2_MOSI</td>
<td>I2S2_SD</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>ADC123_IN13</td>
</tr>
<tr>
<td>12</td>
<td>VSSA</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>13</td>
<td>VDDA</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>14</td>
<td>PA0</td>
<td>WKUP</td>
<td></td>
<td>ETH<em>MII</em>CRS</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>USART2<em>CTS<br />UART4</em>TX</td>
<td>TIM2<em>CH1</em>ETR<br />TIM5<em>CH1<br />TIM8</em>ETR</td>
<td></td>
<td>ADC123_IN0<br />WKUP</td>
</tr>
<tr>
<td>15</td>
<td>PA1</td>
<td></td>
<td></td>
<td>ETH<em>MII</em>RX<em>CLK<br />ETH</em>RMII<em>REF</em>CLK</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>USART2<em>RTS<br />UART4</em>RX</td>
<td>TIM2<em>CH2<br />TIM5</em>CH2</td>
<td></td>
<td>ADC123_IN1</td>
</tr>
<tr>
<td>16</td>
<td>PA2</td>
<td></td>
<td></td>
<td>ETH_MDIO</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>USART2_TX</td>
<td>TIM2<em>CH3<br />TIM5</em>CH3<br />TIM9_CH1</td>
<td></td>
<td>ADC123_IN2</td>
</tr>
<tr>
<td>17</td>
<td>PA3</td>
<td></td>
<td>OTG<em>HS</em>ULPI_D0</td>
<td>ETH<em>MII</em>COL</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>USART2_RX</td>
<td>TIM2<em>CH4<br />TIM5</em>CH4<br />TIM9_CH2</td>
<td></td>
<td>ADC123_IN3</td>
</tr>
<tr>
<td>18</td>
<td>VSS</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>19</td>
<td>VDD</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>20</td>
<td>PA4</td>
<td></td>
<td>OTG<em>HS</em>SOF</td>
<td></td>
<td></td>
<td>DCMI_HSYNC</td>
<td>SPI1<em>NSS<br />SPI3</em>NSS</td>
<td>I2S3_WS</td>
<td></td>
<td>USART2_CK</td>
<td></td>
<td></td>
<td>ADC12<em>IN4<br/>DAC</em>OUT1</td>
</tr>
<tr>
<td>21</td>
<td>PA5</td>
<td></td>
<td>OTG<em>HS</em>ULPI_CK</td>
<td></td>
<td></td>
<td></td>
<td>SPI1_SCK</td>
<td></td>
<td></td>
<td></td>
<td>TIM2<em>CH1</em>ETR<br />TIM8_CH1N</td>
<td></td>
<td>ADC12<em>IN5<br />DAC</em>OU<br/>T2</td>
</tr>
<tr>
<td>22</td>
<td>PA6</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>DCMI_PIXCLK</td>
<td>SPI1_MISO</td>
<td></td>
<td></td>
<td></td>
<td>TIM1<em>BKIN<br />TIM3</em>CH1<br />TIM8<em>BKIN<br />TIM13</em>CH1</td>
<td></td>
<td>ADC12_IN6</td>
</tr>
<tr>
<td>23</td>
<td>PA7</td>
<td></td>
<td></td>
<td>ETH<em>MII</em>RX<em>DV<br />ETH</em>RMII<em>CRS</em>DV</td>
<td></td>
<td></td>
<td>SPI1_MOSI</td>
<td></td>
<td></td>
<td></td>
<td>TIM1<em>CH1N<br />TIM3</em>CH2<br />TIM8<em>CH1N<br />TIM14</em>CH1</td>
<td></td>
<td>ADC12_IN7</td>
</tr>
<tr>
<td>24</td>
<td>PC4</td>
<td></td>
<td></td>
<td>ETH<em>MII</em>RX<em>D0<br />ETH</em>RMII<em>RX</em>D0</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>ADC12_IN14</td>
</tr>
<tr>
<td>25</td>
<td>PC5</td>
<td></td>
<td></td>
<td>ETH<em>MII</em>RX<em>D1<br />ETH</em>RMII<em>RX</em>D1</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>ADC12_IN15</td>
</tr>
<tr>
<td>26</td>
<td>PB0</td>
<td></td>
<td>OTG<em>HS</em>ULPI_D1</td>
<td>ETH<em>MII</em>RXD2</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>TIM1<em>CH2N<br />TIM3</em>CH3<br />TIM8_CH2N</td>
<td></td>
<td>ADC12_IN8</td>
</tr>
<tr>
<td>27</td>
<td>PB1</td>
<td></td>
<td>OTG<em>HS</em>ULPI_D2</td>
<td>ETH<em>MII</em>RXD3</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>TIM1<em>CH3N<br />TIM3</em>CH4<br />TIM8_CH3N</td>
<td></td>
<td>ADC12_IN9</td>
</tr>
<tr>
<td>28</td>
<td>PB2</td>
<td>BOOT1</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>29</td>
<td>PB10</td>
<td></td>
<td>OTG<em>HS</em>ULPI_D3</td>
<td>ETH<em>MII</em>RX_ER</td>
<td></td>
<td></td>
<td>SPI2_SCK</td>
<td>I2S2_CK</td>
<td>I2C2_SCL</td>
<td>USART3_TX</td>
<td>TIM2_CH3</td>
<td></td>
<td></td>
</tr>
<tr>
<td>30</td>
<td>PB11</td>
<td></td>
<td>OTG<em>HS</em>ULPI_D4</td>
<td>ETH<em>MII</em>TX<em>EN<br />ETH</em>RMII<em>TX</em>EN</td>
<td></td>
<td></td>
<td></td>
<td>I2C2_SDA</td>
<td></td>
<td>USART3_RX</td>
<td>TIM2_CH4</td>
<td></td>
<td></td>
</tr>
<tr>
<td>31</td>
<td>VCAP_1</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>32</td>
<td>VDD</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>33</td>
<td>PB12</td>
<td></td>
<td>OTG<em>HS</em>ULPI<em>D5<br />OTG</em>HS_ID</td>
<td>ETH<em>MII</em>TXD0<br />ETH<em>RMII</em>TXD0</td>
<td></td>
<td></td>
<td>SPI2_NSS</td>
<td>I2S2_WS</td>
<td>I2C2_SMBA</td>
<td>USART3_CK</td>
<td>TIM1_BKIN</td>
<td>CAN2_RX</td>
<td></td>
</tr>
<tr>
<td>34</td>
<td>PB13</td>
<td></td>
<td>OTG<em>HS</em>ULPI_D6</td>
<td>ETH<em>MII</em>TXD1<br />ETH<em>RMII</em>TXD1</td>
<td></td>
<td></td>
<td>SPI2_SCK</td>
<td>I2S2_CK</td>
<td></td>
<td>USART3_CTS</td>
<td>TIM1_CH1N</td>
<td>CAN2_TX</td>
<td>OTG<em>HS</em>VBUS</td>
</tr>
<tr>
<td>35</td>
<td>PB14</td>
<td></td>
<td>OTG<em>HS</em>DM</td>
<td></td>
<td></td>
<td></td>
<td>SPI2_MISO</td>
<td>I2S2ext_SD</td>
<td></td>
<td>USART3_RTS</td>
<td>TIM1<em>CH2N<br />TIM8</em>CH2N<br />TIM12_CH1</td>
<td></td>
<td></td>
</tr>
<tr>
<td>36</td>
<td>PB15</td>
<td></td>
<td>OTG<em>HS</em>DP</td>
<td></td>
<td></td>
<td></td>
<td>SPI2_MOSI</td>
<td>I2S2_SD</td>
<td></td>
<td></td>
<td>TIM1<em>CH3N<br />TIM8</em>CH3N<br />TIM12_CH2</td>
<td></td>
<td>RTC_REFIN</td>
</tr>
<tr>
<td>37</td>
<td>PC6</td>
<td></td>
<td></td>
<td></td>
<td>SDIO_D6</td>
<td>DCMI_D0</td>
<td></td>
<td>I2S2_MCK</td>
<td></td>
<td>USART6_TX</td>
<td>TIM3<em>CH1<br />TIM8</em>CH1</td>
<td></td>
<td></td>
</tr>
<tr>
<td>38</td>
<td>PC7</td>
<td></td>
<td></td>
<td></td>
<td>SDIO_D7</td>
<td>DCMI_D1</td>
<td></td>
<td>I2S3_MCK</td>
<td></td>
<td>USART6_RX</td>
<td>TIM3<em>CH2<br />TIM8</em>CH2</td>
<td></td>
<td></td>
</tr>
<tr>
<td>39</td>
<td>PC8</td>
<td></td>
<td></td>
<td></td>
<td>SDIO_D0</td>
<td>DCMI_D2</td>
<td></td>
<td></td>
<td></td>
<td>USART6_CK</td>
<td>TIM3<em>CH3<br />TIM8</em>CH3</td>
<td></td>
<td></td>
</tr>
<tr>
<td>40</td>
<td>PC9</td>
<td></td>
<td></td>
<td>MCO2</td>
<td>SDIO_D1</td>
<td>DCMI_D3</td>
<td></td>
<td>I2C3_SDA</td>
<td>I2C3_SDA</td>
<td></td>
<td>TIM3<em>CH4<br />TIM8</em>CH4</td>
<td></td>
<td></td>
</tr>
<tr>
<td>41</td>
<td>PA8</td>
<td></td>
<td>OTG<em>FS</em>SOF</td>
<td>MCO1</td>
<td></td>
<td></td>
<td></td>
<td>I2C3_SCL</td>
<td></td>
<td>USART1_CK</td>
<td>TIM1_CH1</td>
<td></td>
<td></td>
</tr>
<tr>
<td>42</td>
<td>PA9</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>DCMI_D0</td>
<td></td>
<td>I2C3_SMBA</td>
<td></td>
<td>USART1_TX</td>
<td>TIM1_CH2</td>
<td></td>
<td>OTG<em>FS</em>VBUS</td>
</tr>
<tr>
<td>43</td>
<td>PA10</td>
<td></td>
<td>OTG<em>FS</em>ID</td>
<td></td>
<td></td>
<td>DCMI_D1</td>
<td></td>
<td></td>
<td></td>
<td>USART1_RX</td>
<td>TIM1_CH3</td>
<td></td>
<td></td>
</tr>
<tr>
<td>44</td>
<td>PA11</td>
<td></td>
<td>OTG<em>FS</em>DM</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>USART1_CTS</td>
<td>TIM1_CH4</td>
<td>CAN1_RX</td>
<td></td>
</tr>
<tr>
<td>45</td>
<td>PA12</td>
<td></td>
<td>OTG<em>FS</em>DP</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>USART1_RTS</td>
<td>TIM1_ETR</td>
<td>CAN1_TX</td>
<td></td>
</tr>
<tr>
<td>46</td>
<td>PA13</td>
<td>JTMS-SWDIO</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>47</td>
<td>VCAP_2</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>48</td>
<td>VDD</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>49</td>
<td>PA14</td>
<td>JTCK-SWCLK</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>50</td>
<td>PA15</td>
<td>JTDI</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>SPI1<em>NSS<br />SPI3</em>NSS</td>
<td>I2S3_WS</td>
<td></td>
<td></td>
<td>TIM2<em>CH1</em>ET</td>
<td></td>
<td></td>
</tr>
<tr>
<td>51</td>
<td>PC10</td>
<td></td>
<td></td>
<td></td>
<td>SDIO_D2</td>
<td>DCMI_D8</td>
<td>SPI3_SCK</td>
<td>I2S3_CK</td>
<td></td>
<td>USART3<em>TX<br />UART4</em>TX</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>52</td>
<td>PC11</td>
<td></td>
<td></td>
<td></td>
<td>SDIO_D3</td>
<td>DCMI_D4</td>
<td>SPI3_MISO</td>
<td>I2S3ext_SD</td>
<td></td>
<td>USART3<em>RX<br />UART4</em>RX</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>53</td>
<td>PC12</td>
<td></td>
<td></td>
<td></td>
<td>SDIO_CK</td>
<td>DCMI_D9</td>
<td>SPI3_MOSI</td>
<td>I2S3_SD</td>
<td></td>
<td>USART3<em>CK<br />UART5</em>TX</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>54</td>
<td>PD2</td>
<td></td>
<td></td>
<td></td>
<td>SDIO_CMD</td>
<td>DCMI_D11</td>
<td></td>
<td></td>
<td></td>
<td>UART5_RX</td>
<td>TIM3_ETR</td>
<td></td>
<td></td>
</tr>
<tr>
<td>55</td>
<td>PB3</td>
<td>JTDO / TRACESWO</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>SPI1<em>SCK<br />SPI3</em>SCK</td>
<td>I2S3_CK</td>
<td></td>
<td></td>
<td>TIM2_CH2</td>
<td></td>
<td></td>
</tr>
<tr>
<td>56</td>
<td>PB4</td>
<td>NJTRST</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>SPI1<em>MISO<br />SPI3</em>MISO</td>
<td>I2S3ext_SD</td>
<td></td>
<td></td>
<td>TIM3_CH1</td>
<td></td>
<td></td>
</tr>
<tr>
<td>57</td>
<td>PB5</td>
<td></td>
<td>OTG<em>HS</em>ULPI_D7</td>
<td>ETH<em>PPS</em>OUT</td>
<td></td>
<td>DCMI_D10</td>
<td>SPI3<em>MOSI<br />SPI3</em>MOSI</td>
<td>I2S3_SD</td>
<td>I2C1_SMBA</td>
<td></td>
<td>TIM3_CH</td>
<td>CAN2_RX</td>
<td></td>
</tr>
<tr>
<td>58</td>
<td>PB6</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>DCMI_D5</td>
<td></td>
<td></td>
<td>I2C1_SCL</td>
<td>USART1_TX</td>
<td>TIM4_CH1</td>
<td>CAN2_TX</td>
<td></td>
</tr>
<tr>
<td>59</td>
<td>PB7</td>
<td>FSMC_NL</td>
<td></td>
<td></td>
<td></td>
<td>DCMI_VSYNC</td>
<td></td>
<td></td>
<td>I2C1_SDA</td>
<td>USART1_RX</td>
<td>TIM4_CH2</td>
<td></td>
<td></td>
</tr>
<tr>
<td>60</td>
<td>BOOT0</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>61</td>
<td>PB8</td>
<td></td>
<td></td>
<td>ETH<em>MII</em>TXD3</td>
<td>SDIO_D4</td>
<td>DCMI_D6</td>
<td></td>
<td></td>
<td>I2C1_SCL</td>
<td></td>
<td>TIM4<em>CH3<br />TIM10</em>CH1</td>
<td>CAN1_RX</td>
<td></td>
</tr>
<tr>
<td>62</td>
<td>PB9</td>
<td></td>
<td></td>
<td></td>
<td>SDIO_D5</td>
<td>DCMI_D7</td>
<td>SPI2_NSS</td>
<td>I2S2_WS</td>
<td>I2C1_SDA</td>
<td></td>
<td>TIM4<em>CH4<br />TIM11</em>CH1</td>
<td>CAN1_TX</td>
<td></td>
</tr>
<tr>
<td>63</td>
<td>VSS</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>64</td>
<td>VDD</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>APB1 (142MHz)</th>
<th>APB2 (84MHz)</th>
<th>AHB1 (168MHz)</th>
<th>AHB2 (168MHz)</th>
</tr>
</thead>
<tbody>
<tr>
<td></td>
<td></td>
<td>GPIOA</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>GPIOB</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>GPIOC</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>GPIOD</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>GPIOE</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>GPIOF</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>GPIOG</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>GPIOH</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>GPIOI</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>GPIOJ</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>GPIOK</td>
<td></td>
</tr>
</tbody>
</table></div>
<h2 id="af">AF</h2>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>AF</th>
<th>TIM</th>
<th>I2C</th>
<th>SPI</th>
<th>USART</th>
<th>CAN</th>
</tr>
</thead>
<tbody>
<tr>
<td>AF0</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF1</td>
<td>TIM1<br />TIM2</td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF2</td>
<td>TIM3<br />TIM4<br />TIM5</td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF3</td>
<td>TIM8<br />TIM9<br />TIM10<br />TIM11</td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF4</td>
<td></td>
<td>I2C1<br />I2C2<br />I2C3</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF5</td>
<td></td>
<td></td>
<td>SPI1<br />SPI2<br />AF5_SPI3<br />SPI4<br />SPI5<br />SPI6</td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF6</td>
<td></td>
<td></td>
<td>AF6<em>SPI2<br />SPI3<br />AF6</em>SPI4<br />AF6_SPI5</td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF7</td>
<td></td>
<td></td>
<td>AF7_SPI3</td>
<td>USART1<br />USART2<br />USART3</td>
<td></td>
</tr>
<tr>
<td>AF8</td>
<td></td>
<td></td>
<td></td>
<td>UART4<br />UART5<br />USART6<br />UART7<br />UART8</td>
<td></td>
</tr>
<tr>
<td>AF9</td>
<td>TIM12<br />TIM13<br />TIM14</td>
<td>I2C2<br />I2C3</td>
<td></td>
<td></td>
<td>CAN1<br />CAN2</td>
</tr>
<tr>
<td>AF10</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF11</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF12</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF13</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF14</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>AF15</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<h2 id="dma">DMA</h2>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>APB1 (142MHz)</th>
<th>APB2 (84MHz)</th>
<th>AHB1 (168MHz)</th>
<th>AHB2 (168MHz)</th>
</tr>
</thead>
<tbody>
<tr>
<td></td>
<td></td>
<td>DMA1</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>DMA2</td>
<td></td>
</tr>
<tr>
<td></td>
<td></td>
<td>DMA2D</td>
<td></td>
</tr>
</tbody>
</table></div>
<p>Table 42. DMA1 request mapping</p>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>Peripheral requests</th>
<th>Stream 0</th>
<th>Stream 1</th>
<th>Stream 2</th>
<th>Stream 3</th>
<th>Stream 4</th>
<th>Stream 5</th>
<th>Stream 6</th>
<th>Stream 7</th>
</tr>
</thead>
<tbody>
<tr>
<td>Channel 0</td>
<td>SPI3_RX</td>
<td></td>
<td>SPI3_RX</td>
<td>SPI2_RX</td>
<td>SPI2_TX</td>
<td>SPI3_TX</td>
<td></td>
<td>SPI3_TX</td>
</tr>
<tr>
<td>Channel 1</td>
<td>I2C1_RX</td>
<td></td>
<td>TIM7_UP</td>
<td></td>
<td>TIM7_UP</td>
<td>I2C1_RX</td>
<td>I2C1_TX</td>
<td>I2C1_TX</td>
</tr>
<tr>
<td>Channel 2</td>
<td>TIM4_CH1</td>
<td></td>
<td>I2S3<em>EXT</em>RX</td>
<td>TIM4_CH2</td>
<td>I2S2<em>EXT</em>TX</td>
<td>I2S3<em>EXT</em>TX</td>
<td>TIM4_UP</td>
<td>TIM4_CH3</td>
</tr>
<tr>
<td>Channel 3</td>
<td>I2S3<em>EXT</em>RX</td>
<td>TIM2<em>UP<br/>TIM2</em>CH3</td>
<td>I2C3_RX</td>
<td>I2S2<em>EXT</em>RX</td>
<td>I2C3_TX</td>
<td>TIM2_CH1</td>
<td>TIM2<em>CH2<br/>TIM2</em>CH4</td>
<td>TIM2<em>UP<br/>TIM2</em>CH4</td>
</tr>
<tr>
<td>Channel 4</td>
<td>UART5_RX</td>
<td>USART3_RX</td>
<td>UART4_RX</td>
<td>USART3_TX</td>
<td>UART4_TX</td>
<td>USART2_RX</td>
<td>USART2_TX</td>
<td>UART5_TX</td>
</tr>
<tr>
<td>Channel 5</td>
<td>UART8_TX</td>
<td>UART7_TX</td>
<td>TIM3<em>CH4<br/>TIM3</em>UP</td>
<td>UART7_RX</td>
<td>TIM3<em>CH1<br/>TIM3</em>TRIG</td>
<td>TIM3_CH2</td>
<td>UART8_RX</td>
<td>TIM3_CH3</td>
</tr>
<tr>
<td>Channel 6</td>
<td>TIM5<em>CH3<br/>TIM5</em>UP</td>
<td>TIM5<em>CH4<br/>TIM5</em>TRIG</td>
<td>TIM5_CH1</td>
<td>TIM5<em>CH4<br/>TIM5</em>TRIG</td>
<td>TIM5_CH2</td>
<td></td>
<td>TIM5_UP</td>
<td></td>
</tr>
<tr>
<td>Channel 7</td>
<td></td>
<td>TIM6_UP</td>
<td>I2C2_RX</td>
<td>I2C2_RX</td>
<td>USART3_TX</td>
<td>DAC1</td>
<td>DAC2</td>
<td>I2C2_TX</td>
</tr>
</tbody>
</table></div>
<p>Table 43. DMA2 request mapping</p>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>Peripheral requests</th>
<th>Stream 0</th>
<th>Stream 1</th>
<th>Stream 2</th>
<th>Stream 3</th>
<th>Stream 4</th>
<th>Stream 5</th>
<th>Stream 6</th>
<th>Stream 7</th>
</tr>
</thead>
<tbody>
<tr>
<td>Channel 0</td>
<td>ADC1</td>
<td>SAI1_A</td>
<td>TIM8<em>CH1<br/>TIM8</em>CH2<br/>TIM8_CH3</td>
<td>SAI1_A</td>
<td>ADC1</td>
<td>SAI1_B</td>
<td>TIM1<em>CH1<br/>TIM1</em>CH2<br/>TIM1_CH3</td>
<td></td>
</tr>
<tr>
<td>Channel 1</td>
<td></td>
<td>DCMI</td>
<td>ADC2</td>
<td>ADC2</td>
<td>SAI1_B</td>
<td>SPI6_TX</td>
<td>SPI6_RX</td>
<td>DCMI</td>
</tr>
<tr>
<td>Channel 2</td>
<td>ADC3</td>
<td>ADC3</td>
<td></td>
<td>SPI5_RX</td>
<td>SPI5_TX</td>
<td>CRYP_OUT</td>
<td>CRYP_IN</td>
<td>HASH_IN</td>
</tr>
<tr>
<td>Channel 3</td>
<td>SPI1_RX</td>
<td></td>
<td>SPI1_RX</td>
<td>SPI1_TX</td>
<td></td>
<td>SPI1_TX</td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 4</td>
<td>SPI4_RX</td>
<td>SPI4_TX</td>
<td>USART1_RX</td>
<td>SDIO</td>
<td></td>
<td>USART1_RX</td>
<td>SDIO</td>
<td>USART1_TX</td>
</tr>
<tr>
<td>Channel 5</td>
<td></td>
<td>USART6_RX</td>
<td>USART6_RX</td>
<td>SPI4_RX</td>
<td>SPI4_TX</td>
<td></td>
<td>USART6_TX</td>
<td>USART6_TX</td>
</tr>
<tr>
<td>Channel 6</td>
<td>TIM1_TRIG</td>
<td>TIM1_CH1</td>
<td>TIM1_CH2</td>
<td>TIM1_CH1</td>
<td>TIM1<em>CH4<br/>TIM1</em>TRIG<br/>TIM1_COM</td>
<td>TIM1_UP</td>
<td>TIM1_CH3</td>
<td></td>
</tr>
<tr>
<td>Channel 7</td>
<td></td>
<td>TIM8_UP</td>
<td>TIM8_CH1</td>
<td>TIM8_CH2</td>
<td>TIM8_CH3</td>
<td>SPI5_RX</td>
<td>SPI5_TX</td>
<td>TIM8<em>CH4<br/>TIM8</em>TRIG<br/>TIM8_COM</td>
</tr>
</tbody>
</table></div>
<h2 id="uart">UART</h2>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>APB1 (142MHz)</th>
<th>APB2 (84MHz)</th>
<th>AHB1 (168MHz)</th>
<th>AHB2 (168MHz)</th>
</tr>
</thead>
<tbody>
<tr>
<td></td>
<td>USART1</td>
<td></td>
<td></td>
</tr>
<tr>
<td>USART2</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>USART3</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>UART4</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>UART5</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td></td>
<td>USART6</td>
<td></td>
<td></td>
</tr>
<tr>
<td>UART7</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>UART8</td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<p>Table 42. DMA1 request mapping</p>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>Peripheral</th>
<th>Stream 0</th>
<th>Stream 1</th>
<th>Stream 2</th>
<th>Stream 3</th>
<th>Stream 4</th>
<th>Stream 5</th>
<th>Stream 6</th>
<th>Stream 7</th>
</tr>
</thead>
<tbody>
<tr>
<td>Channel 0</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 1</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 2</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 3</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 4</td>
<td>UART5_RX</td>
<td>USART3_RX</td>
<td>UART4_RX</td>
<td>USART3_TX</td>
<td>UART4_TX</td>
<td>USART2_RX</td>
<td>USART2_TX</td>
<td>UART5_TX</td>
</tr>
<tr>
<td>Channel 5</td>
<td>UART8_TX</td>
<td>UART7_TX</td>
<td></td>
<td>UART7_RX</td>
<td></td>
<td></td>
<td>UART8_RX</td>
<td></td>
</tr>
<tr>
<td>Channel 6</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 7</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>USART3_TX</td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<p>Table 43. DMA2 request mapping</p>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>Peripheral</th>
<th>Stream 0</th>
<th>Stream 1</th>
<th>Stream 2</th>
<th>Stream 3</th>
<th>Stream 4</th>
<th>Stream 5</th>
<th>Stream 6</th>
<th>Stream 7</th>
</tr>
</thead>
<tbody>
<tr>
<td>Channel 0</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 1</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 2</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 3</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 4</td>
<td></td>
<td></td>
<td>USART1_RX</td>
<td></td>
<td></td>
<td>USART1_RX</td>
<td></td>
<td>USART1_TX</td>
</tr>
<tr>
<td>Channel 5</td>
<td></td>
<td>USART6_RX</td>
<td>USART6_RX</td>
<td></td>
<td></td>
<td></td>
<td>USART6_TX</td>
<td>USART6_TX</td>
</tr>
<tr>
<td>Channel 6</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 7</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<h2 id="spi">SPI</h2>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>APB1 (142MHz)</th>
<th>APB2 (84MHz)</th>
<th>AHB1 (168MHz)</th>
<th>AHB2 (168MHz)</th>
</tr>
</thead>
<tbody>
<tr>
<td></td>
<td>SPI1</td>
<td></td>
<td></td>
</tr>
<tr>
<td>SPI2</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>SPI3</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td></td>
<td>SPI4</td>
<td></td>
<td></td>
</tr>
<tr>
<td></td>
<td>SPI5</td>
<td></td>
<td></td>
</tr>
<tr>
<td></td>
<td>SPI6</td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<p>Table 42. DMA1 request mapping</p>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>Peripheral</th>
<th>Stream 0</th>
<th>Stream 1</th>
<th>Stream 2</th>
<th>Stream 3</th>
<th>Stream 4</th>
<th>Stream 5</th>
<th>Stream 6</th>
<th>Stream 7</th>
</tr>
</thead>
<tbody>
<tr>
<td>Channel 0</td>
<td>SPI3_RX</td>
<td></td>
<td>SPI3_RX</td>
<td>SPI2_RX</td>
<td>SPI2_TX</td>
<td>SPI3_TX</td>
<td></td>
<td>SPI3_TX</td>
</tr>
<tr>
<td>Channel 1</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 2</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 3</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 4</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 5</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 6</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 7</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<p>Table 43. DMA2 request mapping</p>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>Peripheral</th>
<th>Stream 0</th>
<th>Stream 1</th>
<th>Stream 2</th>
<th>Stream 3</th>
<th>Stream 4</th>
<th>Stream 5</th>
<th>Stream 6</th>
<th>Stream 7</th>
</tr>
</thead>
<tbody>
<tr>
<td>Channel 0</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 1</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>SPI6_TX</td>
<td>SPI6_RX</td>
<td></td>
</tr>
<tr>
<td>Channel 2</td>
<td></td>
<td></td>
<td></td>
<td>SPI5_RX</td>
<td>SPI5_TX</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 3</td>
<td>SPI1_RX</td>
<td></td>
<td>SPI1_RX</td>
<td>SPI1_TX</td>
<td></td>
<td>SPI1_TX</td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 4</td>
<td>SPI4_RX</td>
<td>SPI4_TX</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 5</td>
<td></td>
<td></td>
<td></td>
<td>SPI4_RX</td>
<td>SPI4_TX</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 6</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 7</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>SPI5_RX</td>
<td>SPI5_TX</td>
<td></td>
</tr>
</tbody>
</table></div>
<h2 id="i2c">I2C</h2>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>APB1 (142MHz)</th>
<th>APB2 (84MHz)</th>
<th>AHB1 (168MHz)</th>
<th>AHB2 (168MHz)</th>
</tr>
</thead>
<tbody>
<tr>
<td>I2C1</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>I2C2</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>I2C3</td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<h2 id="can">CAN</h2>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>APB1 (142MHz)</th>
<th>APB2 (84MHz)</th>
<th>AHB1 (168MHz)</th>
<th>AHB2 (168MHz)</th>
</tr>
</thead>
<tbody>
<tr>
<td>CAN1</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>CAN2</td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<h2 id="dac">DAC</h2>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>APB1 (142MHz)</th>
<th>APB2 (84MHz)</th>
<th>AHB1 (168MHz)</th>
<th>AHB2 (168MHz)</th>
</tr>
</thead>
<tbody>
<tr>
<td>DAC</td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<p>Table 42. DMA1 request mapping</p>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>Peripheral requests</th>
<th>Stream 0</th>
<th>Stream 1</th>
<th>Stream 2</th>
<th>Stream 3</th>
<th>Stream 4</th>
<th>Stream 5</th>
<th>Stream 6</th>
<th>Stream 7</th>
</tr>
</thead>
<tbody>
<tr>
<td>Channel 0</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 1</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 2</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 3</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 4</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 5</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 6</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 7</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td>DAC1</td>
<td>DAC2</td>
<td></td>
</tr>
</tbody>
</table></div>
<h2 id="adc">ADC</h2>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>APB1 (142MHz)</th>
<th>APB2 (84MHz)</th>
<th>AHB1 (168MHz)</th>
<th>AHB2 (168MHz)</th>
</tr>
</thead>
<tbody>
<tr>
<td></td>
<td>ADC1</td>
<td></td>
<td></td>
</tr>
<tr>
<td></td>
<td>ADC2</td>
<td></td>
<td></td>
</tr>
<tr>
<td></td>
<td>ADC3</td>
<td></td>
<td></td>
</tr>
<tr>
<td></td>
<td>ADC</td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<p>Table 43. DMA2 request mapping</p>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>Peripheral requests</th>
<th>Stream 0</th>
<th>Stream 1</th>
<th>Stream 2</th>
<th>Stream 3</th>
<th>Stream 4</th>
<th>Stream 5</th>
<th>Stream 6</th>
<th>Stream 7</th>
</tr>
</thead>
<tbody>
<tr>
<td>Channel 0</td>
<td>ADC1</td>
<td></td>
<td></td>
<td></td>
<td>ADC1</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 1</td>
<td></td>
<td></td>
<td>ADC2</td>
<td>ADC2</td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 2</td>
<td>ADC3</td>
<td>ADC3</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 3</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 4</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 5</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 6</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 7</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<h2 id="tim">TIM</h2>
<p>Table 4. Timer feature comparison </p>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>Timer type</th>
<th>Timer</th>
<th>Counter resolution</th>
<th>Counter type</th>
<th>DMA request generation</th>
<th>Capture/ compare channels</th>
<th>Complementary output</th>
<th>Max interface clock (MHz)</th>
<th>Max timer clock (MHz)</th>
</tr>
</thead>
<tbody>
<tr>
<td>Advanced -control</td>
<td>TIM1, TIM8</td>
<td>16-bit</td>
<td>Up, Down, Up/down</td>
<td>Y</td>
<td>4</td>
<td>Y</td>
<td>84</td>
<td>168</td>
</tr>
<tr>
<td>General</td>
<td>TIM2, TIM5</td>
<td>32-bit</td>
<td>Up, Down, Up/down</td>
<td>Y</td>
<td>4</td>
<td>N</td>
<td>42</td>
<td>84</td>
</tr>
<tr>
<td>General</td>
<td>TIM3, TIM4</td>
<td>16-bit</td>
<td>Up</td>
<td>Y</td>
<td>4</td>
<td>N</td>
<td>42</td>
<td>84</td>
</tr>
<tr>
<td>General</td>
<td>TIM9</td>
<td>16-bit</td>
<td>Up</td>
<td>N</td>
<td>2</td>
<td>N</td>
<td>84</td>
<td>168</td>
</tr>
<tr>
<td>General</td>
<td>TIM10 , TIM11</td>
<td>16-bit</td>
<td>Up</td>
<td>N</td>
<td>1</td>
<td>N</td>
<td>84</td>
<td>168</td>
</tr>
<tr>
<td>General</td>
<td>TIM12</td>
<td>16-bit</td>
<td>Up</td>
<td>N</td>
<td>2</td>
<td>N</td>
<td>42</td>
<td>84</td>
</tr>
<tr>
<td>General</td>
<td>TIM13 , TIM14</td>
<td>16-bit</td>
<td>Up</td>
<td>N</td>
<td>1</td>
<td>N</td>
<td>42</td>
<td>84</td>
</tr>
<tr>
<td>Basic</td>
<td>TIM6, TIM7</td>
<td>16-bit</td>
<td>Up</td>
<td>N</td>
<td>0</td>
<td>N</td>
<td>42</td>
<td>84</td>
</tr>
</tbody>
</table></div>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>APB1 (142MHz)</th>
<th>APB2 (84MHz)</th>
<th>CH1</th>
<th>CH2</th>
<th>CH3</th>
<th>CH4</th>
<th>BKIN</th>
<th>ETR</th>
<th>ET</th>
</tr>
</thead>
<tbody>
<tr>
<td></td>
<td>TIM1</td>
<td>PA8<br />N<em>PA7<br />N</em>PB13</td>
<td>PA9<br />N<em>PB0<br />N</em>PB14</td>
<td>PA10<br />N<em>PB1<br />N</em>PB15</td>
<td>PA11</td>
<td>PA6<br />PB12</td>
<td>PA12</td>
<td></td>
</tr>
<tr>
<td>TIM2</td>
<td></td>
<td>PA0<br />PA5<br />PA15</td>
<td>PA1<br />PB3</td>
<td>PA2<br />PB10</td>
<td>PA3<br />PB11</td>
<td></td>
<td>PA0<br />PA5</td>
<td>PA15</td>
</tr>
<tr>
<td>TIM3</td>
<td></td>
<td>PA6<br />PC6</td>
<td>PA7<br />PC7</td>
<td>PB0<br />PC8</td>
<td>PB1<br />PC9</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM4</td>
<td></td>
<td>PB6</td>
<td>PB7</td>
<td>PB8</td>
<td>PB9</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM5</td>
<td></td>
<td>PA0</td>
<td>PA1</td>
<td>PA2</td>
<td>PA3</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM6</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM7</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td></td>
<td>TIM8</td>
<td>PC6<br />N<em>PA5<br />N</em>PA7</td>
<td>PC7<br />N<em>PB0<br />N</em>PB14</td>
<td>PC8<br />N<em>PB1<br />N</em>PB15</td>
<td>PC9</td>
<td>PA6</td>
<td>PA0</td>
<td></td>
</tr>
<tr>
<td></td>
<td>TIM9</td>
<td>PA2</td>
<td>PA3</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td></td>
<td>TIM10</td>
<td>PB8</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td></td>
<td>TIM11</td>
<td>PB9</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM12</td>
<td></td>
<td>PB14</td>
<td>PB15</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM13</td>
<td></td>
<td>PA6</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>TIM14</td>
<td></td>
<td>PA7</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<p>Table 42. DMA1 request mapping</p>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>Peripheral</th>
<th>Stream 0</th>
<th>Stream 1</th>
<th>Stream 2</th>
<th>Stream 3</th>
<th>Stream 4</th>
<th>Stream 5</th>
<th>Stream 6</th>
<th>Stream 7</th>
</tr>
</thead>
<tbody>
<tr>
<td>Channel 0</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 1</td>
<td></td>
<td></td>
<td>TIM7_UP</td>
<td></td>
<td>TIM7_UP</td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 2</td>
<td>TIM4_CH1</td>
<td></td>
<td></td>
<td>TIM4_CH2</td>
<td></td>
<td></td>
<td>TIM4_UP</td>
<td>TIM4_CH3</td>
</tr>
<tr>
<td>Channel 3</td>
<td></td>
<td>TIM2<em>UP<br/>TIM2</em>CH3</td>
<td></td>
<td></td>
<td></td>
<td>TIM2_CH1</td>
<td>TIM2<em>CH2<br/>TIM2</em>CH4</td>
<td>TIM2<em>UP<br/>TIM2</em>CH4</td>
</tr>
<tr>
<td>Channel 4</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 5</td>
<td></td>
<td></td>
<td>TIM3<em>CH4<br/>TIM3</em>UP</td>
<td></td>
<td>TIM3<em>CH1<br/>TIM3</em>TRIG</td>
<td>TIM3_CH2</td>
<td></td>
<td>TIM3_CH3</td>
</tr>
<tr>
<td>Channel 6</td>
<td>TIM5<em>CH3<br/>TIM5</em>UP</td>
<td>TIM5<em>CH4<br/>TIM5</em>TRIG</td>
<td>TIM5_CH1</td>
<td>TIM5<em>CH4<br/>TIM5</em>TRIG</td>
<td>TIM5_CH2</td>
<td></td>
<td>TIM5_UP</td>
<td></td>
</tr>
<tr>
<td>Channel 7</td>
<td></td>
<td>TIM6_UP</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
</tbody>
</table></div>
<p>Table 43. DMA2 request mapping</p>
<div class="pure-table-scrollable"><table class="pure-table pure-table-horizontal">
<thead>
<tr>
<th>Peripheral</th>
<th>Stream 0</th>
<th>Stream 1</th>
<th>Stream 2</th>
<th>Stream 3</th>
<th>Stream 4</th>
<th>Stream 5</th>
<th>Stream 6</th>
<th>Stream 7</th>
</tr>
</thead>
<tbody>
<tr>
<td>Channel 0</td>
<td></td>
<td></td>
<td>TIM8<em>CH1<br/>TIM8</em>CH2<br/>TIM8_CH3</td>
<td></td>
<td></td>
<td></td>
<td>TIM1<em>CH1<br/>TIM1</em>CH2<br/>TIM1_CH3</td>
<td></td>
</tr>
<tr>
<td>Channel 1</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 2</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 3</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 4</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 5</td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
<td></td>
</tr>
<tr>
<td>Channel 6</td>
<td>TIM1_TRIG</td>
<td>TIM1_CH1</td>
<td>TIM1_CH2</td>
<td>TIM1_CH1</td>
<td>TIM1<em>CH4<br/>TIM1</em>TRIG<br/>TIM1_COM</td>
<td>TIM1_UP</td>
<td>TIM1_CH3</td>
<td></td>
</tr>
<tr>
<td>Channel 7</td>
<td></td>
<td>TIM8_UP</td>
<td>TIM8_CH1</td>
<td>TIM8_CH2</td>
<td>TIM8_CH3</td>
<td></td>
<td></td>
<td>TIM8<em>CH4<br/>TIM8</em>TRIG<br/>TIM8_COM</td>
</tr>
</tbody>
</table></div>
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